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september 2007 rev 2 1/32 1 l6728 single phase pwm controller with powergood features flexible power supply from 5v to 12v power conversion input as low as 1.5v 0.8v internal reference 0.8% output voltage accuracy high-current integrated drivers powergood output sensorless and programmable ocp across low-side r dson ov / uv protections vsen disconnection protection oscillator internally fixed at 300khz ls-less to manage pr e-bias start-up adjustable output voltage disable function internal soft-start vfqfpn 10 package applications memory and termination supply subsystem power supply (mch, ioch, pci...) cpu & dsp power supply distributed power supply general dc / dc converters description l6728 is a single-phase step-down controller with integrated high-current drivers that provides complete control logic and protection to realize in a simple way general dc-dc converters by using a compact vfqfpn 10 package. device flexibility allows managing conversions with power input v in as low as 1.5v and device supply voltage ranging from 5v to 12v. l6728 provides simple control loop with voltage mode ea. the integrated 0.8v reference allows regulating output voltages with 0.8% accuracy over line and temperature variations. oscillator is internally fixed to 300khz. l6728 provides programmable dual level over current protection as well as over and under voltage protection. current information is monitored across the low-side mosfet rdson saving the use of expensive and space- consuming sense resistors. pgood output easily provides real-time information on output voltage status, through vsen dedicated output monitor. vfqfpn 10 table 1. device summary order codes package packaging l6728 vfqfpn 10 tube L6728TR vfqfpn 10 tape & reel www.st.com
content l6728 2/32 content 1 typical application cir cuit and block diagram . . . . . . . . . . . . . . . . . . . . 4 1.1 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 pins description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . 5 2.1 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.1 power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 low-side-less start up (lsless) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 over current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8.1 over current threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 output voltage setting and protec tions . . . . . . . . . . . . . . . . . . . . . . . . 14 10 application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.1 compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.2 layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 11.1 inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 11.2 output capacitor(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11.3 input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
l6728 content 3/32 12 20a demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.1 board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 12.1.1 power input (vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 12.1.2 output (vout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 12.1.3 signal input (vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 12.1.4 test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 12.1.5 board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 13 5a demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 13.1 board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 13.1.1 power input (vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 13.1.2 output (vout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.3 signal input (vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.4 test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.5 board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 14 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . 30 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
typical application circuit and block diagram l6728 4/32 1 typical application circuit and block diagram 1.1 application circuit figure 1. typical application circuit 1.2 block diagram figure 2. block diagram 1 3 2 boot ugate phase lgate / oc 4 hs ls v in = 1.5v to 12v l c out vout load c hf c bulk c dec fb 8 r fb comp / dis 7 r f c f c p gnd vcc v cc = 5v to 12v 6 5 l6728 reference schematic l6728 r ocset pgood r pg pgood vsen 10 9 r os r os r fb vcc boot lgate / oc fb ugate comp / dis gnd adaptive anti cross conduction hs ls vcc error amplifier + - 0.8v 300 khz oscillator pwm phase control logic & protections v octh oc l6728 i ocset pgood vsen v out monitor clock
l6728 pins description and connection diagrams 5/32 2 pins description and connection diagrams 2.1 pin descriptions figure 3. pins connection (top view) table 2. pins description pin # name function 1boot hs driver supply. connect through a capacitor (100nf) to the floating node (ls-drain) pin and provide necessary bootstrap diode from vcc. 2 phase hs driver return path, current-reading and adaptive-dead-time monitor. connect to the ls drain to sense rdson drop to measure the output current. this pin is also used by the adaptive-dead-time control circuitry to monitor when hs mosfet is off. 3 ugate hs driver output. connect directly to hs mosfet gate. 4 lgate / oc lgate . ls driver output. connect directly to ls mosfet gate. oc . over current threshold set. during a short period of time following vcc rising over uvlo threshold, a 10 a current is sourced from this pin. connect to gnd with an r ocset resistor greater than 5k ? to program oc threshold. the resulting voltage at this pin is sampled and held internally as the oc set point. maximum programmable oc threshold is 0.55v. a voltage greater than 0.6v activates an internal clamp and causes oc threshold to be set at the maximum value. 5gnd all internal references, logic and drivers are connected to this pin. connect to the pcb ground plane. 6vcc device and drivers power supply. operative range from 5v to 12v. filt er with at least tbd nf mlcc to gnd. 7 comp / dis comp. error amplifier output. connect with an r f - c f // c p to fb to compensate the device control loop. dis. the device can be disabled by pushing this pin lower than 0.75v(typ). setting free the pin, the device enables again. 8fb error amplifier inverting input. connect with a resistor r fb to the output regulated vo ltage. output resistor divider may be used to regulate voltages higher than the reference.
thermal data l6728 6/32 3 thermal data table 3. thermal data 9 vsen regulated voltage sense pin for ovp and uvp protections and pgood. connect to the output regulated voltage, or to the output resistor divider if the regulated voltage is higher than the reference. 10 pgood open drain output set free after ss has finished and pulled low when vsen is outside the relative window. pull up to a voltage equal or lower than vcc. if not used it can be left floating. table 2. pins description (continued) pin # name function symbol parameter value unit r th(ja) thermal resistance junction to ambient (device soldered on 2s2p, 67mm x 69mm board) 45 c/w r th(jc) thermal resistance junc tion to case 5 c/w t max maximum junction temperature 150 c t stg storage temperature range -40 to 150 c t j junction temperature range -40 to 125 c p tot maximum power dissipation at t a = 25c 2.25 w
l6728 electrical specifications 7/32 4 electrical specifications 4.1 absolute maximum ratings table 4. absolute maximum ratings 4.2 electrical characteristics symbol parameter value unit vcc to gnd -0.3 to 15 v v boot, v ugate to phase to gnd to gnd; t < 200ns 15 33 45 v v phase to gnd to gnd; t < 200ns -5 to 18 -8 to 30 v v lgate to gnd -0.3 to vcc+0.3 v fb, comp, vsen to gnd -0.3 to 3.6 v pgood to gnd -0.3 to vcc+0.3 v table 5. electrical characteristics (v cc = 5v to 12v; t j = 0 to 70 c unless otherwise specified). symbol parameter test conditions min. typ. max. unit supply current and power-on i cc vcc supply current ugate and lgate = open 6 ma i boot boot supply current ugate = open; phase to gnd 0.7 ma uvlo vcc turn-on vcc rising 4.1 v hysteresis 0.2 v oscillator f sw main oscillator accuracy 270 300 330 khz ? v osc pwm ramp amplitude 1.4 v d max maximum duty cycle 80 % reference and error amplifier output voltage accuracy -0.8 - 0.8 % a 0 dc gain (1) 120 db gbwp gain-bandwidth product (1) 15 mhz sr slew-rate (1) 8v/ s dis disable threshold comp falling 0.70 0.85 v
electrical specifications l6728 8/32 gate drivers i ugate hs source current boot - phase = 5v 1.5 a r ugate hs sink resistance boot - phase = 5v 1.1 ? i lgate ls source current vcc = 5v 1.5 a r lgate ls sink resistance vcc = 5v 0.65 ? over-current protection i ocset ocset current source sourced from lgate pin, during oc setting phase. 91011 a v oc_sw oc switch-over threshold v lgate/oc rising 600 mv over & under-voltage protections ovp ovp threshold vsen rising 0.90 1.00 1.10 v un-latch, vsen fall ing 0.35 0.40 0.45 v uvp uvp threshold vsen falling 0.50 0.60 0.70 v vsen vsen bias current sourced from vsen 100 na pgood pgood upper threshold vsen rising 0.860 0.890 0.920 v lower threshold vsen falling 0.680 0.710 0.740 v v pgoodl pgood voltage low i pgood = -4ma 0.4 v 1. guaranteed by design, not subject to test. table 5. electrical characteristics (continued) (v cc = 5v to 12v; t j = 0 to 70 c unless otherwise specified). symbol parameter test conditions min. typ. max. unit
l6728 device description 9/32 5 device description l6728 is a single-phase pwm controller with embedded high-current drivers that provides complete control logic and protections to realize in an easy and simple way a general dc- dc step-down converter. designed to drive n-channel mosfets in a synchronous buck topology, with its high level of integration this 10 -pin device allows reducing cost and size of the power supply solution also providing real-time pgood in a compact vfqfpn10 3x3mm. l6728 is designed to operate from a 5v or 12v supply. the output voltage can be precisely regulated to as low as 0.8v with 0.8% accuracy over line and temperature variations. the switching frequency is in ternally set to 300khz. this device provides a simple control loop with a voltage-mode error-amplifier. the error- amplifier features a 15mhz gain-bandwidth product and 8v/s slew rate, allowing high regulator bandwidth for fast transient response. to avoid load damages, l6728 provides over current protection as well as over voltage, under voltage and feedback disconnection protection. the over current trip threshold is programmable by a simple resistor connected from lgate to gnd. output current is monitored across low-side mosfet r dson , saving the use of expensive and space- consuming sense resistor. output voltage is monitored through dedicated vsen pin. l6728 implements soft-start increasing the internal reference in closed loop regulation. low-side-less feature allows the device to perform soft-start over pre-biased output avoiding high current return through the output inductor and dangerous negative spike at the load side. l6728 is available in a compact vfqfn10 3x3mm package with exposed pad.
driver section l6728 10/32 6 driver section the integrated high-current drivers allow using different types of power mosfet (also multiple mosfets to reduce the equivalent r dson ), maintaining fast switching transition. the driver for the high-side mosfet uses bo ot pin for supply and phase pin for return. the driver for low-side mosfet uses the vcc pin for supply and gnd pin for return. the controller embodies an anti-shoot-through and adaptive dead-time control to minimize low side body diode conduction time, maintaining good efficiency while saving the use of schottky diode: to check high-side mosfet turn off, ph ase pin is sensed. when the voltage at phase pin drops down, the low-side mosfet gate drive is suddenly applied; to check low-side mosfet turn off, lgate pin is sensed. when the voltage at lgate has fallen, the high-side mosfet gate drive is suddenly applied. if the current flowing in the in ductor is negative, voltage on phase pin will never drop. to allow the low-side mosfet to turn-on even in this case, a watchdog controller is enabled: if the source of the high-side mosfet doesn't drop, the low side mosfet is switched on so allowing the negative current of the inductor to recirculate. this mechanism allows the system to regulate even if the current is negative. power conversion input is flexible: 5v, 12v bus or any bus that allows the conversion (see maximum duty cycle limitations) can be chosen freely. 6.1 power dissipation l6728 embeds high current mosfet drivers for both high side and low side mosfets: it is then important to consider the power that the device is going to dissipate in driving them in order to avoid overcoming the maximum junction operative temperature. two main terms contribute in the device power dissipation: bias power and drivers' power. device bias power (p dc ) depends on the static consumption of the device through the supply pins and it is simply quantifiable as follow (assuming to supply hs and ls drivers with the same vcc of the device): drivers power is the power needed by the driver to continuously switch on and off the external mosfets; it is a function of the switching frequency and total gate charge of the selected mosfets. it can be quantified considering that the total power p sw dissipated to switch the mosfets (easy calculable) is dissipated by three main factors: external gate resistance (when present), intrinsic mosfet resistance and intrinsic driver resistance. this last term is the important one to be determined to calculate the device power dissipation. the total power dissipated to switch the mosfets results: external gate resistors helps the device to dissipate the switching power since the same power p sw will be shared between the internal driv er impedance and the external resistor resulting in a general cooling of the device. p dc v cc i cc i boot + () ? = p sw f sw q ghs v boot q gls v cc ? + ? () ? =
l6728 soft start 11/32 7 soft start l6728 implements a soft start to smoothly charge the output filter avoiding high in-rush currents to be required from the input power supply. the device gradually increases the internal reference from 0v to 0.8v in 4.5ms (typ.), in closed loop regulation, linearly charging the output capacitors to the final regulation voltage. in the event of an over current triggering during soft start, the over current logic will override the soft start sequence and will shut down the pwm logic and both the high side and low side gates. this condition is latched, cycle vcc to recover. the device begins soft start phase only when vcc power supply is above uvlo threshold and over current threshold setting phase has been completed. 7.1 low-side-less start up (lsless) in order to avoid any kind of negative undershoot and dangerous return from the load during start-up, l6728 performs a special sequence in enabling ls driver to switch: during the soft- start phase, the ls driver results disabled (ls = off) until the hs starts to switch. this avoid the dangerous negative spike on the output voltage that can happen if starting over a pre-biased output. if the output voltage is pre-biased to a voltage higher than the final one, the hs would never start to switch. in this case, at the end of soft start time, ls is enabled and discharge the output to the final regulation value. this particular feature of the device masks the ls turn-on only from the control loop point of view: protections by-pass this turning on the ls mosfet in case of need. figure 4. lsless startup (left) vs. non-lsless startup (right)
over current protection l6728 12/32 8 over current protection the over current function protects the converter from a shorted output or overload, by sensing the output current information across the low side mosfet drain-source on- resistance, r dson . this method reduces cost and enhances converter efficiency by avoiding the use of expensive and space-consuming sense resistors. the low side r dson current sense is impl emented by comparing t he voltage at the phase node when ls mosfet is turned on with the programmed ocp thresholds voltages, internally held. if the monitored voltage is bigger than these thresholds, an over current event is detected. for maximum safety and load protection, l6728 implements a dual level over current protection system: 1 st level threshold : it is the user externally set threshold. if the monitored voltage on phase exceeds this threshold, a 1 st level over current is detected. if four 1 st level oc events are detected in four consecutive switching cycles, over current protection will be triggered. 2 nd level threshold : it is an internal threshold whose value is equal to 1 st level threshold multiplied by a factor 1.5. if the monitored voltage on phase exceeds this threshold, over current protec tion will be triggered immediately. when over current protection is triggered, the device turns off both ls and hs mosfets in a latched condition. to recover from over current protection triggered condition, vcc power supply must be cycled.
l6728 over current protection 13/32 8.1 over current threshold setting l6728 allows to easily program a 1 st level over current threshold ranging from 50mv to 550mv, simply by adding a resistor (r ocset ) between lgate and gnd. 2 nd level threshold will be automatically set accordingly. during a short period of time (about 5ms) following vcc rising over uvlo threshold, an internal 10a current (i ocset ) is sourced from lgate pin, determining a voltage drop across r ocset . this voltage drop will be sa mpled and internally held by the device as 1 st level over current threshold. the oc setting procedure overall time length is about 5ms. connecting a r ocset resistor between lgate and gnd, the programmed 1 st level threshold will be: the programmed 2 nd level threshold will be: r ocset values range from 5k ? to 55k ? . in case r ocset is not connected, the device sets the ocp thresholds to the maximum values: an internal safety clamp on lgate is triggered as soon as lgate voltage reaches 600mv, setting the maximum threshold and suddenly ending oc setting phase. i octh1 i ocset r ocset ? r dson --------------- -------------- -------------- - = i octh2 1.5 i ocset r ocset ? r dson --------------- --------------- ------------- - ? =
output voltage setting and protections l6728 14/32 9 output voltage setting and protections l6728 is capable to precisely regulate an output voltage as low as 0.8v. in fact, the device comes with a fixed 0.8v internal reference that guarantee the output regulated voltage to be within 0.8% tolerance over line and temperature variations (excluding output resistor divider tolerance, when present). output voltage higher than 0.8v can be easily achieved by adding a resistor r os between fb pin and ground. referring to figure 1 , the steady state dc output voltage will be: where v ref is 0.8v. l6728 monitors the voltage at vsen pin and compares it to internal reference voltage in order to provide under voltage and over voltage protections as well as pgood signal. according to the level of vsen, different actions are performed from the controller: pgood if the voltage monitored through vsen exits from the pgood window limits, the device de-asserts the pgood signal still continui ng switching and re gulating. pgood is asserted at the end of the soft-start phase. under voltage protection if the voltage at vsen pin drops below uv threshold, the device turns off both hs and ls mosfets, latching the condition. cycle vcc to recover. over voltage protection if the voltage at vsen pin rises over ov threshold (1v typ), over voltage protection turns off hs mosfet and turns on ls mosf et. the ls mosfet will be turned off as soon as vsen goes below vref/2 (0.4v). the condition is latched, cycle vcc to recover. notice that, even if the device is latched, the device still controls the ls mosfet and can switch it on whenever vsen rises above 0.4v. feedback disconnection protection in order to provide load prot ection even if vsen pin is not connected, a 100na bias current is always sour ced from this pin. if vsen pin is not connected, this current will permanently pull it up causing the device to detect an ov: thus ls will be latched on preventing output voltage from rising out of control. v out v ref 1 r fb r os ---------- - + ?? ?? ? =
l6728 application details 15/32 10 application details 10.1 compensation network the control loop showed in figure 5 is a voltage mode control loop. the output voltage is regulated to the internal reference (when presen t, offset resistor between fb node and gnd can be neglected in control loop calculation). error amplifier output is compar ed to oscillator saw-tooth wave form to provide pwm signal to the driver section. pwm signal is then transferred to the switching node with v in amplitude. this waveform is f iltered by the output filter. the converter transfer function is the small signal transfer function between the output of the ea and v out . this function has a double pole at frequency f lc depending on the l-c out resonance and a zero at f esr depending on the output capacitor esr. the dc gain of the modulator is simply the input voltage v in divided by the peak-to- peak oscilla tor voltage ? v osc . figure 5. pwm control loop the compensation network closes the loop joining v out and ea output with transfer function ideally equal to -z f / z fb . compensation goal is to close the control loop assuring high dc regulation accuracy, good dynamic performances and stability. to achiev e this, the overall loop needs high dc gain, high bandwidth and good phase margin. high dc gain is achieved giving an integrator shape to compensation network transfer function. loop bandwidth (f 0db ) can be fixed choosing the right r f /r fb ratio, however, for stability, it should not exceed f sw /2 . to achieve a good phase margin, the control loop gain has to cross 0db axis with -20db/decade slope. as an example, figure 6 shows an asymptotic bode plot of a type iii compensation. l r c out esr r f c f c p r fb c s osc v in ? v osc + + _ _ v out v ref z f z fb pwm comparator error amplifier r s
application details l6728 16/32 figure 6. example of type iii compensation. open loop converter singularities: a) b) compensation network singularities frequencies: a) b) c) d) to place the poles and zeroes of the compensation network, the following suggestions may be followed: a) set the gain r f /r fb in order to obtain the desired closed loop regulator bandwidth according to the approximated formula (suggested values for r fb is in the range of some k ? ): gain [db] log (freq) 0db open loop ea gain closed loop gain compensation gain open loop converter gain f lc f esr f z1 f z2 f p1 f p2 20log (r f /r fb ) 20log (v in / ? v osc ) f 0db f lc 1 2 lc out ? ---------------------------------- = f esr 1 2 c out esr ?? ------------------------------------------- - = f z1 1 2 r f c f ?? ------------------------------ = f z2 1 2 r fb r s + () c s ?? ---------------------------------------------------- - = f p1 1 2 r f c f c p ? c f c p + --------------------- ?? ?? ?? -------------------------------------------------- = f p2 1 2 r s c s ?? ------------------------------ - = r f r fb ---------- f 0db f lc ------------ ? v osc v in ------------------ - ? =
l6728 application details 17/32 b) place f z1 below f lc (typically 0.5*f lc ): c) place f p1 at f esr : d) place f z2 at f lc and f p2 at half of the switching frequency: e) check that compensation network gain is lower than open loop ea gain before f 0db ; f) check phase margin obtained (it should be greater than 45) and repeat if necessary. 10.2 layout guidelines l6728 provides control functions and high current integrated drivers to implement high- current step-down dc-dc converters. in this kind of application, a good layout is very important. the first priority when placing components for these applications has to be reserved to the power section, minimizing the length of each connection and loop as much as possible. to minimize noise and voltage spikes (emi and losses) power connections (highlighted in figure 7 ) must be a part of a power plane and anyway realized by wide and thick copper traces: loop must be anyway minimized. the critical components, i.e. the power mosfets, must be close one to the other. the use of multi-layer printed circuit board is recommended. the input capacitance (c in ), or at least a portion of the total capacitance needed, has to be placed close to the power section in order to eliminate the stray inductance generated by the copper traces. low esr and esl capacitors are preferred, mlcc are suggested to be connected near the hs drain. use proper vias number when power traces have to move between different planes on the pcb in order to reduce both parasitic resistance and inductance. moreover, reproducing the same high-current trac e on more than one pcb layer will reduce the parasitic resistance associated to that connection. connect output bulk capacitors (c out ) as near as possible to the load, minimizing parasitic inductance and resistance associated to the copper trace, also adding extra decoupling capacitors along the way to the load when this results in being far from the bulk capacitors bank. c f 1 r f f lc ?? ----------------------------- = c p c f 2 r f c f f esr 1 ? ??? ---------------------------------------------------------- = r s r fb f sw 2f ? lc ----------------- - 1 ? --------------------------- = c s 1 r s f sw ?? ------------------------------- =
application details l6728 18/32 figure 7. power connections (heavy lines) gate traces and phase trace must be sized according to the driver rms current delivered to the power mosfet. the device robustness allows managing applications with the power section far from the controller without losing performances. anyway, when possible, it is recommended to minimize the distance between controller and power section. small signal components and connections to critical nodes of the application, as well as bypass capacitors for the device supply, are also important. locate bypass capacitor (vcc and bootstrap capacitor) and feedback compensati on components as close to the device as practical. for over curren t programmability, place r ocset close to the device and avoid leakage current paths on comp/oc pin, since the internal current source is only 60 a. systems that do not use schottky diode in parallel to the low-side mosfet might show big negative spikes on the phase pin. this spik e must be limited within the absolute maximum ratings (for example, adding a gate resistor in series to hs mosfet gate), as well as the positive spike, but has an additional consequen ce: it causes the bootstrap capacitor to be over-charged. this extra-charge can cause, in the worst case condition of maximum input voltage and during particular transients, that boot-to-phase voltage overcomes the absolute maximum ratings also causing device failures. it is then suggested in this cases to limit this extra-charge by adding a small resistor in series to the boot capacitor (one resistor in series to boot). figure 8. drivers turn-on and turn-off paths l c in v in ugate phase lgate gnd load l6728 c out r gate r int c gd c gs c ds vcc ls driver ls mosfet gnd lgate r gate r int c gd c gs c ds boot hs driver hs mosfet phase ugate
l6728 application information 19/32 11 application information 11.1 inductor design the inductance value is defined by a compromise between the dynamic response time, the efficiency, the cost and the size. the inductor has to be calculated to maintain the ripple current ( ? i l ) between 20% and 30% of the maximum output current (typ). the inductance value can be calculated with the following relationship: where f sw is the switching frequency, v in is the input voltage and v out is the output voltage. figure 9 shows the ripple current vs. the output voltage for different values of the inductor, with v in = 5v and v in = 12v. increasing the value of the inductance reduces the current ripple but, at the same time, increases the converter response time to a dynamic load change. the response time is the time required by the inductor to change its curren t from initial to final va lue. until the inductor has not finished its charging time, the output current is supplied by the output capacitors. minimizing the response time can minimi ze the output capacitance required. if the compensation network is well designed, during a load variation the device is able to set a duty cycle value very different (0% or 80%) from steady state one. when this condition is reached, the response time is limited by the time required to change the inductor current. figure 9. inductor current ripple vs. output voltage l v in v out ? f sw ? i l ? ----------------------------- - v out v in -------------- ? = 0 2 4 6 8 10 012345 output voltage [v] inductor current ripple [a] vin=12v, l=1uh vin=12v, l=2uh vin=5v, l=500nh vin=5v, l=1.5uh
application information l6728 20/32 11.2 output capacitor(s) the output capacitors are basic components to define the ripple voltage across the output and for the fast transient response of the power supply. they depend on the output voltage ripple requirements, as well as any output voltage deviation requirement during a load transient. during steady-state conditions, the output voltage ripple is influenced by both the esr and capacitive value of the output capacitors as follow: where ? i l is the inductor current ripple. in particular, the expression that defines ? v out_c takes in consideration the output capacitor charge and discharge as a consequence of the inductor current ripple. during a load variation, the output capacitors supplies the current to the load or absorb the current stored into the inductor until the converter reacts. in fact, even if the controller recognizes immediately the load transient and sets the duty cycle at 80% or 0%, the current slope is limited by the inductor value. the output voltage has a drop that also in this case depends on the esr and capactive charge/discharge as follow: where ? v l is the voltage applied to the inductor during the transient response ( for the load appliance or v out for the load removal). mlcc capacitors have typically low esr to minimize the ripple but also have low capacitance that do not minimize the voltage deviation during dynamic load variations. on the contrary, electrolytic capacitors have big capacitance to minimize voltage deviation during load transients while they does not show the same esr values of the mlcc resulting then in higher ripple voltages. for these reasons, a mix between electrolytic and mlcc capacitor is suggeted to minimize ripple as well as reducing voltage deviation in dynamic mode. 11.3 input capacitors the input capacitor bank is designed considering mainly the input rms current that depends on the output deliverable current (i out ) and the duty-cycle (d) for the regulation as follow: the equation reaches its maximum value, i out /2, with d = 0.5. the losses depends on the input capacitor esr and, in worst case, are: ? v out_esr ? i l esr ? = ? v out_c ? i l 1 8c out f sw ?? -------------------------------------- - ? = ? v out_esr ? i out esr ? = ? v out_c ? i out l ? i out ? 2c out ? v l ?? ------------------------------------- - ? = d max v in v out ? ? i rms i out d1d ? () ? ? = pesri out 2 ? () 2 ? =
l6728 20a demo board 21/32 12 20a demo board l6728 demo board realizes in a four-layer pcb a step-down dc/dc converter and shows the operation of the device in a general purpose application. the input voltage can range from 5v to 12v buses and the output voltage is fixed at 1.25v. the application can deliver an output current up to 30a. the switching frequency is 300 khz. figure 10. l6728 - 20a demo board (left) and components placement (right) figure 11. l6728 - top (left) and bottom (right) layers
20a demo board l6728 22/32 figure 12. 20a demo board schematic
l6728 20a demo board 23/32 table 6. 20a demo board - bill of material qty reference description package capacitors 2 c1, c2 electrolityc capacitor 1800 f 16v radial 10 x 25mm 7 c3 to c9 not mounted na 1 c10 mlcc, 100nf, 16v, x7r smd0603 3 c11 to c13 mlcc, 4.7 f, 16v, x7r smd1206 2c14, c38 mlcc, 1 f, 16v, x7r smd0805 13 c16, c17, c21, c22, c25, c26, c27, c28, c29, c30, c34 not mounted na 2 c15, c19 mlcc, 10 f, 16v, x5r smd1206 2 c18, c20 electrolityc capacitor 2200 f 6.3v radial 10 x 20mm 1 c23 mlcc, 6.8nf, x7r smd0603 1 c24 mlcc, 33nf, x7r 1 c35 mlcc, 68pf, x7r 2 c36, c37 not mounted na resistors 4 r1, r2, r20, r17 resistor, 3r3, 1/16w, 1% smd0603 4 r3, r5, r11, r16 resistor, 0r, 1/8w, 1% smd0805 1 r4 resistor, 1r8, 1/8w, 1% 5 r10, r12, r14, r15, r21 not mounted na 2 r6, r9 resistor, 2k2, 1/16w, 1% smd0603 2 r8, r13 resistor, 3k9, 1/16w, 1% 1 r7 resistor, 18k, 1/16w, 1% 1 r19 resistor, 22k, 1/16w, 1% 1 r18 resistor, 20k, 1/16w, 1% inductor 1l1 inductor, 1.25 h, t60-18, 6turns, 2xawg18 na active components 1 d1 diode, 1n4148 sot23 3 q1 to q4 not mounted na 1 q5 std70nh02l dpack 1 q6 std80nh02l 1 u1 controller, l6728 dfn10, 3x3mm
20a demo board l6728 24/32 12.1 board description 12.1.1 power input (vin) this is the input voltage for the power conversi on. the high-side drain is connected to this input. this voltage can range from 1.5v to 12vbus. if the voltage is between 4.5v and 12v it can supply also the device (through the vcc pin) and in this case the r16 (0ohm) resistor must be present. 12.1.2 output (vout) the output voltage is fixed at 1.25v but it can be changed by replacing the resistors r8 (sense partition lower resistor ) and r13 (feedback partition lower resistor). the over- current-protection limit is set at 15a but it can be changed by replacing the resistors r18. 12.1.3 signal input (vcc) using the input voltage vin to supply the cont roller no power is required at this input. however the controller can be supplied separately from the power stage through the vcc input (4.5-12v) and, in this case, the r16 (0ohm) resistor must be unsoldered. 12.1.4 test points several test points are provided to have easy access at all important signal characterizing the device: ? comp: the output of the error amplifier; ? fb: the inverting input of the error amplifier; ? pgood: signaling the regular functioning (active high); ? vgdhs: the bootstrap diode anode; ? phase: phase node; ? lgate: low-side gate pin of the device; ? hgate: high-side gate pin of the device.
l6728 20a demo board 25/32 12.1.5 board characterization figure 13. 20a demo board efficiency 50 55 60 65 70 75 80 85 90 95 100 0 2 4 6 8 10121416182022 output current [a] efficiency [%] vin=12v, vout=1.25v vin=5v, vout=1.25v vin=12v, vout=2.5v vin=5v, vout=2.5v
5a demo board l6728 26/32 13 5a demo board l6728 demo board realizes in a two-layer pcb a step-down dc/dc converter and shows the operation of the device in a general-purpose low-current application. the input voltage can range from 5v to 12v buses and the output voltage is fixed at 1.25v. the application can deliver an output current in excess of 5a. the switching frequency is 300 khz. figure 14. l6728 - 5a demo board (left) and components placement (right) figure 15. l6728 - 5a demo board top (left) and bottom (right) layers
l6728 5a demo board 27/32 figure 16. 5a demo board schematic
5a demo board l6728 28/32 table 7. 5a demo board - bill of material 13.1 board description 13.1.1 power input (vin) this is the input voltage for the power conversi on. the high-side drain is connected to this input. this voltage can range from 1.5v to 12vbus. if the voltage is between 4.5v and 12v it can supply also the device (through the vcc pin) and in this case the r16 (0ohm) resistor must be present. qty reference description package capacitors 2 c12, c51 mlcc, 10 f, 16v, x5r smd1206 1 c10 mlcc, 100nf, 16v, x7r smd0603 2 c14, c38 mlcc, 1 f, 16v, x7r smd0805 1c39 mlcc, 22 f, 6.3v, x5r smd1206 1 c30 330 f, 6.3v, 6tpf330m9l smd7434 2 c23, c36 mlcc, 6.8nf, x7r smd0603 1 c24 mlcc, 68nf, x7r 1 c35 mlcc, 220pf, x7r resistors 3 r1, r2, r17 resistor, 3r3, 1/16w, 1% smd0603 3 r3, r5, r16 resistor, 0r, 1/8w, 1% smd0805 1 r4 resistor, 1r8, 1/8w, 1% 1 r14 resistor, 15r, 1/8w, 1% 2 r6, r9 resistor, 2k2, 1/16w, 1% smd0603 2 r8, r13 resistor, 3k9, 1/16w, 1% 1 r7 resistor, 18k, 1/16w, 1% 1 r19 resistor, 22k, 1/16w, 1% 1 r18 resistor, 20k, 1/16w, 1% inductor 1l1 inductor, 2,20 h, wurth 744324220lf na active components 1 d1 diode, bat54 sot23 1 q5 sts9d8nh3ll so8 1 u1 controller, l6728 dfn10, 3x3mm
l6728 5a demo board 29/32 13.1.2 output (vout) the output voltage is fixed at 1.25v but it can be changed by replacing the resistors r8 (sense partition lower resistor ) and r13 (feedback partition lower resistor). the over- current-protection limit is set at 15a but it can be changed by replacing the resistors r18. 13.1.3 signal input (vcc) using the input voltage vin to supply the cont roller no power is required at this input. however the controller can be supplied separately from the power stage through the vcc input (4.5-12v) and, in this case, the r16 (0ohm) resistor must be unsoldered. 13.1.4 test points several test points are provided to have easy access at all important signal characterizing the device: ? comp: the output of the error amplifier; ? fb: the inverting input of the error amplifier; ? pgood: signaling the regular functioning (active high); ? vgdhs: the bootstrap diode anode; ? phase: phase node; ? lgate: low-side gate pin of the device; ? hgate: high-side gate pin of the device. 13.1.5 board characterization figure 17. 5a demo board efficiency 50 55 60 65 70 75 80 85 90 95 100 0123456 output current [a] efficiency [%] vin = 12v, vout = 1.25v vin = 5v, vout = 1.25v vin = 12v, vout = 2.5v vin = 5v, vout = 2.5v
mechanical data and package dimensions l6728 30/32 14 mechanical data and package dimensions in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect . the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com figure 18. mechanical data and package dimensions dimensions ref. mm inch min. typ. max. min. typ. max. a 0.80 0.90 1.00 0.031 0.035 0.039 a1 0.02 0.05 0.001 0.002 a2 0.70 0.028 a3 0.20 0.008 b 0.18 0.23 0.30 0.007 0.009 0.012 d 3.00 0.118 d2 2.21 2.26 2.31 0.087 0.089 0.091 e 3.00 0.118 e2 1.49 1.64 1.74 0.059 0.065 0.069 e0.50 0.20 l 0.3 0.4 0.5 0.012 0.016 0.020 package and packing information dfn10 (3x3) weight: not available dual flat no-lead package m m m m 0.75 0.295 0.25 0.098
l6728 revision history 31/32 15 revision history table 8. document revision history date revision changes 29-jun-2007 1 initial release 17-sep-2007 2 updated t j value in table 3: thermal data on page 6
l6728 32/32 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2007 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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